Integrated circuits are very complex devices that include multiple layers. Each layer may include conductive material, isolating material while other layers may include semi-conductive materials. These various materials are arranged in patterns, usually in accordance with the expected functionality of the integrated circuit. The patterns also reflect the manufacturing process of the integrated circuits.
Integrated circuits are manufactured by complex multi-staged manufacturing processes. During this multi-staged process resistive material is (i) deposited on a substrate/layer, (ii) exposed by a photolithographic process, and (iii) developed to produce a pattern that defines some areas to be later etched.
Various metrology, inspection and failure analysis techniques evolved for inspecting integrated circuits both during the fabrication stages, between consecutive manufacturing stages, either in combination with the manufacturing process (also termed “in line” inspection techniques) or not (also termed “off line” inspection techniques). Various optical as well as charged particle beam inspection tools and review tools are known in the art, such as the VeritySEM™, Compluss™ and SEMVision™ of Applied Materials Inc. of Santa Clara, Calif.
Charged particle beam inspection tools, metrology tool or FIB tools are also manufactured by additional vendors, such as but not limited to FEI Company of Hilsboro, Oreg., KLA-Tencor Inc. of San Jose, Calif., Hitachi Inc. of Tokyo, Japan, and the like.
Various prior art CD-SEMs and method for measuring critical dimensions are illustrated in the following U.S. patent applications which are incorporated herein by reference: U.S. patent application publication number 20030015699 of Su, titled “Integrated critical dimension control for semiconductor device manufacturing”; U.S. patent application publication number 20050048654 of Wu, titled “Method of evaluating reticle pattern overlay registration”; U.S. patent application publication number 20040173746 of Petrov, et al., titled “Method and system for use in the monitoring of samples with a charged particles beam”; U.S. patent application publication number 20040056207 of Petrov, et al., titled “Deflection method and system for use in a charged particle beam column”; U.S. patent application publication number 20030218133 of Petrov, et al., titled “Charged particle beam column and method for directing a charged particle beam”; U.S. patent application publication number 20030209667 of Petrov, et al., titled “Charged particle beam apparatus and method for inspecting samples;
Manufacturing failures may affect the electrical characteristics of the integrated circuits. Some of these failures result from unwanted deviations from the required dimensions of the patterns. A “critical dimension” is usually the width of a patterned line, the distance between two patterned lines, the width of a contact and the like.
One of the goals of metrology is to determine whether the inspected objects includes deviations from these critical dimensions. This inspection is usually done by charged particles beam imaging that provide the high resolution required to measure said deviations.
A typical measured structural element is a line that has an upper portion (line top), a lower portion (line bottom) and two sidewalls. The measurement of the bottom width of the line involves measuring the top width of the line as well as measuring its sidewalls.
Measurement of a structural element line critical dimensions using only a top view (in which the electron beam that scans the line is perpendicular to the substrate) may result in faulty results, especially when one of the sidewalls has a negative sidewall angle such that an upper end of the sidewall obscures a lower end of that sidewall.
In order to address said inaccuracies CD-SEM tools that enable electronic tilt of an electron beam were introduced. NanoSEM 3D and VeritySEM of Applied Materials from Santa Clara, is a fully automated CD-SEM that has a column that allows electronic tilting as well as mechanical tilting of the scanning electron beam to scan the wafer surface with various tilt angles from several directions.
Some metrology methods include illuminating one side of a structural element, as well as illuminating its top and assuming that the structural element sidewalls are symmetrical. Another metrology method includes illuminating both sides of the structural element.
Multiple measurements have some disadvantages. First, they reduce the throughput of the inspection system, especially when the measurement involves changing the tilt of scanning electron beam. Such a change may require a de-Gauss stage, as well as an electron beam stabilization stage. A further disadvantage of multiple measurements results from degradation (for example shrinkage and carbonization) of the measured structural element, as well as unwanted charging of the measured structural element.
As the size of structural elements shrink the metrology tools are required to be more accurate.
There is a need to provide an efficient metrology method and system.